march 2013 FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 1 FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ? 500 v, 8 a, 1.05 ? features ?r ds(on) = 850 m ? ( typ.) @ v gs = 10 v, i d = 4 a ? low gate charge ( typ. 18 nc) ? low c rss ( typ. 9 pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability ? rohs compliant applications ? lcd/ led/ pdp tv ? lighting ? uninterruptible power supply description unifet tm mosfet is fairchild semiconductor ? ?s high voltage mosfet family based on planar stripe and dmos technology. this mosfet is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. unifet ultra frfet tm mosfet has much superior body diode reverse recovery performance. its t rr is less than 50nsec and the reverse dv/d t immunity is 20v/nsec while normal planar mosfets have over 200nsec and 4.5v/nsec respectively. therefore unifet ultra frfet mosfet can remove additional component and im prove system reliability in certain applications that require performance improvement of the mosfet?s body diode. this device family is suitable for switch- ing power converter applications su ch as power factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp ballasts. d g s to-220f s d g mosfet maximum ratings t c = 25 o c unless otherwise noted* thermal characteristics symbol parameter FDPF10N50UT unit v dss drain to source voltage 500 v v gss gate to source voltage 30 v i d drain current - continuous (t c = 25 o c) 8* a - continuous (t c = 100 o c) 4.8* i dm drain current - pulsed (note 1) 32* a e as single pulsed avalanche energy (note 2) 320 mj i ar avalanche current (note 1) 8 a e ar repetitive avalanche energy (note 1) 12.5 mj dv/dt peak diode recovery dv/dt (note 3) 20 v/ns p d power dissipation (t c = 25 o c) 42 w - derate above 25 o c0.33w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter FDPF10N50UT unit r ? jc thermal resistance, junction to case, max. 3.0 o c/w r ? ja thermal resistance, junction to ambien t, max. 62.5 drain current limited by maximum junction temperature
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 2 package marking and ordering information t c = 25 o c unless otherwise noted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity FDPF10N50UT FDPF10N50UT to-220f - - 50 symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 250 ? a, v gs = 0v, t j = 25 o c 500 - - v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 o c-0.6-v/ o c i dss zero gate voltage drain current v ds = 500v, v gs = 0v - - 25 ? a v ds = 400v, t c = 125 o c - - 250 i gss gate to body leakage current v gs = 30v, v ds = 0v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 ? a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 4a - 0.85 1.05 ? g fs forward transconductance v ds = 20v, i d = 4a - 8.5 - s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 850 1130 pf c oss output capacitance - 115 155 pf c rss reverse transfer capacitance - 9 13.5 pf q g total gate charge at 10v v ds = 400v, i d = 10a v gs = 10v (note 4) -1824nc q gs gate to source gate charge - 5 - nc q gd gate to drain ?miller? charge - 7.5 - nc t d(on) turn-on delay time v dd = 250v, i d = 10a r g = 25 ??? v gs = 10v (note 4) -1540ns t r turn-on rise time - 38 86 ns t d(off) turn-off delay time - 46 102 ns t f turn-off fall time - 33 76 ns i s maximum continuous drain to source diode forward current - - 8 a i sm maximum pulsed drain to source diode forward current - - 32 a v sd drain to source diode forward voltage v gs = 0v, i sd = 8a - - 1.6 v t rr reverse recovery time v gs = 0v, i sd = 8a di f /dt = 100a/ ? s -44-ns q rr reverse recovery charge - 45 - nc notes: 1: repetitive rating: pulse width limi ted by maximum junction temperature 2: l = 10mh, i as = 8a, v dd = 50v, r g = 25 ? , starting t j = 25c 3: i sd ?? 8a, di/dt ?? 200a/ ? s, v dd ?? bv dss , starting t j = 25c 4: essentially independent of operating temperature typical characteristics
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.1 1 10 20 1 10 20 v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v *notes: 1. 250 ? s pulse test 2. t c = 25 o c i d ,drain current[a] v ds ,drain-source voltage[v] 2468 0.1 1 10 20 25 o c 150 o c *notes: 1. v ds = 20v 2. 250 ? s pulse test v gs ,gate-source voltage[v] i d ,drain current[a] 0 5 10 15 20 0.8 1.0 1.2 1.4 1.6 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ m ? ] , drain-source on-resistance i d , drain current [a] 0.00.51.01.52.0 1 10 30 *notes: 1. v gs = 0v 2. 250 ? s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0 5 10 15 20 0 2 4 6 8 10 *note: i d = 10a v ds = 100v v ds = 250v v ds = 400v v gs , gate-source voltage [v] q g , total gate charge [nc] 0.1 1 10 30 0 500 1000 1500 2000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v]
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. maximum safe operating area vs. temperature figure 9. maximum drain current vs. case temperature figure 10. transient thermal response curve -100 -50 0 50 100 150 200 0.88 0.92 0.96 1.00 1.04 1.08 1.12 1.16 *notes: 1. v gs = 0v 2. i d = 250 ? a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] ? s 100 ? s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 1 2 3 4 5 i d , drain current [a] t c , case temperature [ o c ] 10 -5 10 -4 10 -3 10 -2 10 -1 11010 2 0.005 0.01 0.1 1 5 0.01 0.1 0.2 0.05 0.02 *notes: 1. z ? jc (t) = 3.0 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [ z ? jc ] rectangular pulse duration [sec] t 1 p dm t 2
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 5 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 6 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 7 package dimensions dimensions in millimeters to-220m03 * front/back side isolation voltage : 2700v
FDPF10N50UT n-channel unifet tm ultra frfet tm mosfet ?2009 fairchild semiconductor corporation FDPF10N50UT rev. c0 www.fairchildsemi.com 8 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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